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M16C/5L Group, M16C/56 Group
12.2.3
Interrupt Control Register 2
(INT3IC, INT5IC, INT4IC, INT0IC to INT2IC)
Interrupt Control Register 2
b7 b6 b5 b4
b3
b2
b1
0
Symbol
INT3IC
INT5IC
INT4IC
Rewrite these registers at a point where an interrupt request for the corresponding register is not
generated.
IR (Interrupt request bit) (b3)
Do not set the IR bit to 1 when it is 0.
POL (Polarity select bit) (b4)
When the IFSRi bit in the IFSR register is 1 (both edges), set the POL bit in the INTiIC register to 0
(falling edge) (i = 0 to 5).
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
Refer to the table below for symbols and addresses.
Bit Symbol
Bit Name
ILVL0
Interrupt priority level select
ILVL1
bit
ILVL2
IR
Interrupt request bit
POL
Polarity select bit
—
Reserved bit
(b5)
—
No register bits. If necessary, set to 0. The read value is undefined.
(b7-b6)
Address
0044h
0048h
0049h
Address
Function
b2
b1 b0
0
0
0 : Level 0 (interrupt disabled)
0
0
1 : Level 1
0
1
0 : Level 2
0
1
1 : Level 3
1
0
0 : Level 4
1
0
1 : Level 5
1
1
0 : Level 6
1
1
1 : Level 7
0: Interrupt not requested
1: Interrupt requested
0 : Select falling edge
1 : Select rising edge
Set to 0
Symbol
INT0IC
INT1IC
INT2IC
12. Interrupts
Reset Value
XX00 X000b
RW
RW
RW
RW
RW
RW
RW
—
Address
005Dh
005Eh
005Fh
Page 172 of 803
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