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Renesas M16C/50 Series User Manual page 631

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M16C/5L Group, M16C/56 Group
23.1.24 CAN0 Time Stamp Register (C0TSR)
CAN0 Time Stamp Register
b15
Note:
1. Read the C0TSR register in 16-bit units.
Figure 23.29 C0TSR Register
When the C0TSR register is read, the value of the time stamp counter (16-bit free-running counter) at
that moment is read.
The value of the time stamp counter reference clock is a multiple of 1 bit time, as configured by the
TSPS bit in the C0CTLR register.
The time stamp counter stops in CAN sleep mode and CAN halt mode, and is initialized in CAN reset
mode.
The time stamp counter value is stored to TSL and TSH in the C0MBj register (j = 0 to 31) when a
received message is stored in a receive mailbox.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
(1)
b0
Symbol
C0TSR
Free-running counter value for the time stamp function
Address
D7D5h-D7D4h
Function
23. CAN Module
Reset Value
0000h
Counter Value
RW
0000h to FFFFh
RO
Page 594 of 803

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