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M16C/5L Group, M16C/56 Group
8.2.3
Oscillation Stop Detection Register (CM2)
Oscillation Stop Detection Register
b7
b6 b5 b4
b3
b2
b1
0
0
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting this register.
Bits CM20, CM21, and CM27 do not change at oscillator stop detect reset.
See Table 9.3 "Clock-Related Bit Setting and Modes" to select a clock and a mode.
CM20 (Oscillator stop/restart detect enable bit) (b0)
Set the CM20 bit to 0 (oscillator stop/restart detect function disabled) to enter stop mode. Set the CM20
bit back to 1 (enabled) after exiting stop mode.
When the PM21 bit in the PM2 register is 1 (clock change disabled), the CM20 bit remains unchanged
even when being written.
CM21 (System clock select bit 2) (b1)
When the CM07 bit is 0 (main clock, PLL clock, or on-chip oscillator clock used as CPU clock source),
the CPU clock source and the peripheral function clock f1 can be selected by the CM21 bit. When the
CM07 bit is 1 (sub clock used as CPU clock source), the peripheral function clock f1 can be selected by
the CM21 bit.
To set the CM21 bit to 1 (on-chip oscillator clock), set the FRA01 bit in the FRA0 register to select either
the 125 kHz on-chip oscillator, or the 40 MHz on-chip oscillator.
When the CM20 bit is 1 (oscillator stop/restart detect function enabled) and the CM23 bit is 1 (main
clock stopped), do not set the CM21 bit to 0 (main clock or PLL clock).
When the CM20 bit is 1 (oscillator stop/restart detect function enabled), the CM27 bit is 1 (oscillator
stop/restart detect interrupt), and the main clock is used as a CPU clock source, the CM21 bit becomes
1 (on-chip oscillator clock) if the main clock stop is detected. Refer to 8.7 "Oscillator Stop/Restart Detect
Function" for details.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
CM2
Bit Symbol
Bit Name
Oscillator stop/restart detect
CM20
enable bit
CM21
System clock select bit 2
Oscillator stop/restart detect
CM22
flag
CM23
XIN monitor flag
—
Reserved bits
(b5-b4)
—
No register bit. If necessary, set to 0. The read value is undefined.
(b6)
Operation select bit
CM27
(when an oscillator stop/restart
is detected)
Address
000Ch
Function
0: Oscillator stop/restart detect function
disabled
1: Oscillator stop/restart detect function
enabled
or PLL clock
0: Main clock
1: On-chip oscillator clock
0: Main clock stop/restart not detected
1: Main clock stop/restart detected
0: Main clock oscillating
1: Main clock stopped
Set to 0
0: Oscillator stop detect reset
1: Oscillator stop/restart detect interrupt
8. Clock Generator
Reset Value
0X00 0010b
RW
RW
RW
RW
RO
RW
—
RW
Page 97 of 803
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