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M16C/5L Group, M16C/56 Group
28.20 Notes on A/D Converter
Note
The 64-pin package has no AN0_4 to AN0_7 (P0_4 to P0_7), AN2_0 to AN2_3 (P1_0 to P1_3),
AN2_5 to AN2_7 (P9_5 to P9_7).
28.20.1 Analog Input Pin
Do not use any pin from AN4 to AN7 as analog input pin if any pin from KI0 to KI3 is used as a key input
interrupt.
28.20.2 Pin Configuration
To prevent operation errors due to noise or latchup, and to reduce conversion errors, place capacitors
between the AVSS pin and the AVCC pin, the VREF pin, and analog inputs (ANi (i = 0 to 7), AN0_i,
AN2_i, and AN3_0 to AN3_2). Also, place a capacitor between the VCC pin and VSS pin.
ANi: ANi (i = 0 to 7), AN0_i, AN2_i, and AN3_0 to AN3_2
Notes:
1. Reference values: C1 ≥ 0.47 μ F, C2 ≥ 0.47 μ F, C3 ≥ 100 pF, C4 ≥ 0.1 μ F
2. The traces for the capacitor and MCU should be as short and as wide as much as physically
possible.
Figure 28.12 Example of Pin Configuration
28.20.3 Register Access
Set registers associated with A/D converter after setting the CKS3 bit in the ADCON2 register. However
the other bits in the ADCON2 register and the CKS3 bit can be set at the same time. After changing the
CKS3 bit, set the others in the same way.
Write registers ADCON0 (excluding the ADST bit), ADCON1, and ADCON2 when A/D conversion
stops (before a trigger is generated).
After A/D conversion stops, set the ADSTBY bit in the ADCON1 register from 1 to 0.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
MCU
VCC
AVCC
VCC
C4
VREF
VSS
AVSS
ANi
VCC
C2
C1
C3
28. Usage Notes
Page 795 of 803
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