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M16C/5L Group, M16C/56 Group
AAS (Slave address compare flag) (b2)
The AAS bit function in read access is described below. See Table 22.9 "Functions Enabled by Writing
to the S10 Register" for the bit function in write access.
Conditions to become 0:
•
The S00 register is written.
•
The ES0 bit in the S1D0 register is set to 0 (I
•
The IHR bit in the S1D0 register is set to 1 (I
Conditions to become 1:
•
In slave receive mode, the MSLAD bit in the S4D0 register is 1 (registers S0D0 to S0D2), the ALS
bit in the S1D0 register is 0 (addressing format), and the received slave address is matched with
bits SAD6 to SAD0 in any registers from S0D0 to S0D2.
•
In slave receive mode, the MSLAD bit is 0, the ALS bit in the S1D0 register is 0 (addressing
format), and the received slave address is matched with bits SAD6 to SAD0 in the S0D0 register.
•
In slave receive mode, the ALS bit in the S1D0 register is 0 (addressing format) and the received
slave address is 0000000b (general call).
AL (Arbitration lost detect flag) (b3)
The AL bit function in read access is described below. See Table 22.9 "Functions Enabled by Writing to
the S10 Register" for the bit function in write access.
Conditions to become 0:
•
The S00 register is written.
•
The ES0 bit in the S1D0 register is set to 0 (I
•
The IHR bit in the S1D0 register is set to 1 (I
Conditions to become 1:
•
In master transmit mode or master receive mode, the SDAMM pin level changes to low by an
external device, not by the ACK clock, when slave address is transmitted.
•
The SDAMM pin level changes to low by an external device for other than the ACK clock when
data is transmitted in master transmit mode.
•
In master transmit mode or master receive mode, the SDAMM pin level changes to low by an
external device when start condition is transmitted.
•
In master transmit mode or master receive mode, the SDAMM pin level changes to low by an
external device when stop condition is transmitted.
•
The function to prevent start condition overlaps is activated.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
22. Multi-master I
2
C interface disabled).
2
C interface reset).
2
C interface disabled).
2
C interface reset).
2
C-bus Interface
Page 518 of 803
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