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M16C/5L Group, M16C/56 Group
23.2.1
CAN Reset Mode
CAN reset mode is provided for CAN communication configuration.
When the CANM bit in the C0CTLR register is set to 01b, the CAN module enters CAN reset. Then the
RSTST bit in the C0STR register is set to 1. Do not change the CANM bit until the RSTST bit is set to 1.
Configure the C0BCR register before exiting CAN reset mode to any other modes.
The following registers are initialized to their reset values after entering CAN reset mode and their
initialized values are retained during CAN reset mode:
• C0MCTLj register (j = 0 to 31)
• C0STR register (except bits SLPST and TFST)
• C0EIFR register
• C0RECR register
• C0TECR register
• C0TSR register
• C0MSSR register
• C0MSMR register
• C0RFCR register
• C0TFCR register
• C0TCR register
• C0ECSR register (except EDPM bit)
The previous values of the following registers are retained after entering CAN reset mode.
• C0CLKR register
• C0CTLR register
• C0STR register (bits SLPST and TFST)
• C0MIER register
• C0EIER register
• C0BCR register
• C0CSSR register
• C0ECSR register (EDPM bit only)
• C0MBj register
• Registers C0MKR0 to C0MKR7
• Registers C0FIDCR0 and C0FIDCR1
• C0MKIVLR register
• C0AFSR register
• C0RFPCR register
• C0TFPCR register
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
23. CAN Module
Page 599 of 803
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