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M16C/5L Group, M16C/56 Group
12.6
Interrupts and Interrupt Vectors
One interrupt vector consists of 4 bytes. Set the start address of each interrupt routine in the respective
interrupt vectors. When an interrupt request is accepted, the CPU branches to the address set in the
corresponding interrupt vector. Figure 12.2 shows an Interrupt Vector.
Figure 12.2
Interrupt Vector
12.6.1
Fixed Vector Tables
The fixed vector tables are allocated to addresses from FFFDCh to FFFFFh. Table 12.5 lists the Fixed
Vector Tables. In the flash memory MCU version, the vector addresses (H) of fixed vectors are used for
the ID code check function and OFS1 address. For details, refer to 26. "Flash Memory".
Table 12.5
Fixed Vector Tables
Interrupt Source
Undefined instruction (UND instruction)
Overflow (INTO instruction)
(2)
BRK instruction
Address match
(1)
Single-step
Watchdog timer,
oscillator stop/restart detect,
voltage monitor 2
DBC
(1)
NMI
Reset
Notes:
1.
Do not use this interrupt because it is provided exclusively for use by development tools.
2.
If the value of address FFFE6h is FFh, program execution starts from the address shown by the
vector in the relocatable vector table.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
MSB
Vector address (L)
Vector address (H)
Vector Table Addresses
Address (L) to Address (H)
Lower address
Middle address
Upper
0 0 0 0
address
0 0 0 0
0 0 0 0
FFFDCh to FFFDFh
FFFE0h to FFFE3h
FFFE4h to FFFE7h
FFFE8h to FFFEBh
FFFECh to FFFEFh
FFFF0h to FFFF3h
FFFF4h to FFFF7h
FFFF8h to FFFFBh
FFFFCh to FFFFFh
12. Interrupts
LSB
Reference
M16C/60, M16C/20,
M16C/Tiny Series Software
Manual
12.11 "Address Match
Interrupt"
-
13. "Watchdog Timer"
8. "Clock Generator"
7. "Voltage Detector"
-
12.9 " NMI Interrupt"
6. "Resets"
Page 182 of 803
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