Advertisement
M16C/5L Group, M16C/56 Group
a. Entering high-speed mode or medium-speed mode from 40 MHz on-chip oscillator mode, 125 kHz
on-chip oscillator mode or low-speed mode
(1) Start the main clock and wait until the oscillation stabilizes. Refer to 8.3.1 "Main Clock" for
details.
(2) Set the CM06 bit to 1 (divide-by-8 mode).
(3) Set the CM11 bit to 0, the CM21 bit to 0 and the CM07 bit to 0 (main clock selected as CPU clock
source).
b. Entering PLL operating mode from high-speed mode or medium-speed mode
(1) Select the division of reference frequency counter by setting bits PLC05 and PLC04 in the PLC0
register, and the multiplication rate by setting bits PLC02 to PLC00 in the PLC0 register.
(2) Set the PLC07 bit to 1 (PLL on).
(3) Wait for tsu(PLL) until the PLL clock stabilizes.
(4) Set the CM11 bit to 1, the CM21 bit to 0, and the CM07 bit to 0 (PLL clock selected as CPU clock
source).
c. Entering high-speed mode or medium-speed mode from PLL operating mode
(1) Select the main clock divide ratio by the CM06 bit and bits CM17 to CM16.
(2) Set the CM11 bit to 0, the CM21 bit to 0, and the CM07 bit to 0 (main clock selected as CPU
clock source).
(3) Set the PLC07 bit to 0 (PLL off).
d. Entering 40 MHz on-chip oscillator mode from high-speed mode, medium-speed mode, or 125 kHz
on-chip oscillator mode
(1) Start the 40 MHz on-chip oscillator and wait until the oscillation stabilizes.
Refer to 8.3.4 "fOCO-F" for details.
(2) Set the CM06 bit to 1 (divide-by-8 mode)
(3) Set the FRA01 bit to 1 (40 MHz on-chip oscillator).
(4) Set the CM21 bit to 1 (on-chip oscillator clock selected as CPU clock source).
e. Entering 125 kHz on-chip oscillator mode from high-speed mode, medium-speed mode, or low-
speed mode
(1) Start the 125 kHz on-chip oscillator and wait until the oscillation stabilizes. Refer to 8.3.5 "125
kHz On-Chip Oscillator Clock (fOCO-S)" for details.
(2) Set the FRA01 bit to 0 (125 kHz on-chip oscillator).
(3) Set the CM21 bit to 1 (on-chip oscillator clock selected as CPU clock source).
(4) Set the CM07 bit to 0 (main clock, PLL clock, or on-chip oscillator clock selected as CPU clock
source).
f. Entering low-speed mode from high-speed mode, medium-speed mode, or 125 kHz on-chip
oscillator mode
(1) Start the sub clock and wait until the oscillation stabilizes. Refer to 8.3.6 "Sub Clock (fC)" for
details.
(2) Set the CM07 bit to 1 (sub clock selected as CPU clock source).
g. Entering 125 kHz on-chip oscillator low power mode from 125 kHz on-chip oscillator mode
Entering low power mode from low-speed mode
Follow both or either of the procedures below (in no particular order).
(1) Stop the main clock. Refer to 8.3.1 "Main Clock" for details.
(2) Stop the 40 MHz on-chip oscillator. Refer to 8.3.4 "fOCO-F" for details for details.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
9. Power Control
Page 127 of 803
Advertisement
