Renesas M16C/50 Series User Manual page 594

M16C/5L Group, M16C/56 Group
23.1.4 CAN0 Mask Register k (C0MKRk) (k = 0 to 7)
CAN0 Mask Register k
b31b28 b18b17
0 0 0
Note:
1. Write to registers C0MKR0 to C0MKR7 in CAN reset mode or CAN halt mode.
Figure 23.5 Registers C0MKR0 to C0MKR7
Refer to 23.5 "Acceptance Filtering and Masking Function" about the masking function in FIFO mailbox
mode.
23.1.4.1 EID Bit
The EID bit is the filter mask bit corresponding to the CAN extended ID bit. This bit is used to receive
extended ID messages.
When the EID bit is 0, the corresponding EID bit is not compared for the received ID and the mailbox
ID.
When this bit is 1, the corresponding EID bit is compared for the received ID and the mailbox ID.
23.1.4.2 SID Bit
The SID bit is the filter mask bit corresponding to the CAN standard ID bit. This bit is used to receive
both standard ID and extended ID messages.
When the SID bit is 0, the corresponding SID bit is not compared for the received ID and the mailbox
ID.
When this bit is 1, the corresponding SID bit is compared for the received ID and the mailbox ID.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
(1)
(k = 0 to 7)
b0
Symbol
C0MKR0, C0MKR1
C0MKR2, C0MKR3
C0MKR4, C0MKR5
C0MKR6, C0MKR7
Bit Symbol
EID Extended ID Bit
SID Standard ID Bit
—
Reserved
(b31-b29)
Address
D703h-D700h, D707h-D704h
D70Bh-D708h, D70Fh-D70Ch
D713h-D710h, D717h-D714h
D71Bh-D718h, D71Fh-D71Ch
Bit Name
0: Corresponding EID bit is not
compared
1: Corresponding EID bit is compared
0: Corresponding SID bit is not
compared
1: Corresponding SID bit is compared
Set to 0.
23. CAN Module
Reset Value
Undefined
Undefined
Undefined
Undefined
Function RW
RW
RW
RW
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