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Renesas M16C/50 Series User Manual page 497

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M16C/5L Group, M16C/56 Group
Table 21.10
Registers Used and Settings in UART Mode
Register
UCLKSEL0
PCLKR
UiTB
UiRB
OER, FER, PER, SUM
UiBRG
SMD2 to SMD0
UiMR
UiC0
UiC1
(3)
U2SMR
(3)
U2SMR2
(3)
U2SMR3
(3)
U2SMR4
i = 0 to 4
Notes:
1.
This table does not describe a procedure.
2.
The bits used for transmit/receive data are as follows: Bits 0 to 6 when character bit length is 7 bits; bits 0 to
7 when character bit length is 8 bits; bits 0 to 8 when character bit length is 9 bits.
3.
In case of UART2.
4.
The values of bits 7 and 8 are undefined when character bit length is 7 bits.
The values of bit 8 is undefined when character bit length is 8 bits.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Bits
OCOSEL0
Select clock prior to division for UART0 to UART2.
OCOSEL1
Select clock prior to division for UART3 to UART4.
PCLK1
Select the count source for the UiBRG register.
0 to 8
Set transmission data.
0 to 8
Reception data can be read.
Error flag
11
When read, the read value is undefined.
0 to 7
Set bit rate.
Set to 100b when character bit length is 7 bits.
Set to 101b when character bit length is 8 bits.
Set to 110b when character bit length is 9 bits.
CKDIR
Select the internal clock or external clock.
STPS
Select number of stop bits.
PRY, PRYE
Select whether parity is included and whether odd or even.
IOPOL
Select the TXD/RXD input/output polarity.
CLK0, CLK1
Select the count source for the UiBRG register.
If CTS or RTS is used, select which function to use.
CRS
TXEPT
Transmit register empty flag
Enable or disable the CTS or RTS function. Set this bit to 1 (disabled) when
CRD
using UART4.
NCH
Select TXDi pin output mode.
CKPOL
Set to 0.
LSB first or MSB first can be selected when character bit length is 8 bits. Set to 0
UFORM
when character bit length is 7 or 9 bits.
TE
Set to 1 to enable transmission.
TI
Transmit buffer empty flag
RE
Set to 1 to enable reception.
RI
Reception complete flag
UiIRS
Select source of UARTi transmit interrupt.
UiRRM
Set to 0.
UiLCH
Set to 1 to use reversed data logic.
UiERE
Set to 0.
0 to 7
Set to 0.
0 to 7
Set to 0.
0 to 7
Set to 0.
0 to 7
Set to 0.
21. Serial Interface UARTi (i = 0 to 4)
(1)
Function
(2)
(2, 4)
Page 460 of 803

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