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Renesas M16C/50 Series User Manual page 239

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M16C/5L Group, M16C/56 Group
13.2.1
Voltage Monitor 2 Control Register (VW2C)
Voltage Monitor 2 Control Register
b7 b6 b5 b4
b3
b2
b1
Set the PRC3 bit in the PRCR register to 1 (write enabled) before rewriting the VW2C register.
Bits VW2C2 and VW2C3 do not change at voltage monitor 2 reset, oscillator stop detect reset,
watchdog timer reset, or software reset.
When rewriting the VW2C register (excluding the VW2C3 bit), the VW2C2 bit may become 1. Set the
VW2C2 bit to 0 after rewriting the VW2C register.
VW2C3 (WDT Detection Flag) (b3)
Use this bit in an interrupt routine to determine the source of the interrupts from the watchdog timer, the
oscillator stop/restart detect, and voltage monitor 2.
Conditions to become 0:
Writing 0 by a program
Condition to become 1:
Watchdog timer underflow detected
This flag remains unchanged even if 1 is written by a program.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
VW2C
Bit Symbol
Bit Name
Voltage monitor 2 interrupt/
VW2C0
reset enable bit
Voltage monitor 2 digital filter
VW2C1
disable mode select bit
Voltage change detection
VW2C2
flag
Watchdog timer detection
VW2C3
flag
VW2F0
Sampling clock select bit
VW2F1
Voltage monitor 2 mode
VW2C6
select bit
Voltage monitor 2 interrupt/
VW2C7
reset generation condition
select bit
Address
1000 0X10b
002Ch
power-on reset, voltage monitor 0 reset)
0 : Disabled
1 : Enabled
0 : Digital filter enabled
1 : Digital filter disabled
0 : Not detected
1 : Vdet2 passage detected
0 : Not detected
1 : Watchdog timer underflow detected
b5 b4
0
0 : fOCO-S divided by 1
0
1 : fOCO-S divided by 2
1
0 : fOCO-S divided by 4
1
1 : fOCO-S divided by 8
0 : Voltage monitor 2 interrupt at Vdet2 passage
1 : Voltage monitor 2 reset at Vdet2 passage
0: When VCC reaches or goes above
Vdet2
1: When VCC reaches or goes below
Vdet2
13. Watchdog Timer
Reset Value
(hardware reset,
Function
Page 202 of 803
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