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Renesas M16C/50 Series User Manual page 343

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M16C/5L Group, M16C/56 Group
Timer B2
Reload
PWCON
Timer B2
1
underflow
0
Counter
(Timer mode)
Write signal to
timer B2
INV10
Start trigger signal for
timers A1, A2, and A4
TA4 register
Reload
Trigger
Counter
(One-shot timer mode)
INV11
T Q
When setting the TA4S bit to 0,
signal is set to 0.
TA1 register
Reload
Trigger
Counter
(One-shot timer mode)
INV11
T Q
When setting the TA1S bit to 0, signal is
set to 0.
TA2 register
Reload
Trigger
Counter
(One-shot timer mode)
INV11
T Q
When setting the TA2S bit to 0,
signal is set to 0.
Note:
1. When the INV06 bit is 0 (triangular wave modulation mode), a transfer trigger is generated only at the
first timer B2 underflow after writing to registers IDB0 and IDB1.
INV07, INV06, INV01, INV00: Bits in the INVC0 register
INV16, INV15, INV13 to INV10: Bits in the INVC1 register
DUB0, DU0: Bits in the IDB0 register
DUB1, DU1: Bits in the IDB1 register
PWCON: Bit in the TB2SC register
TA4S, TA2S, TA1S: Bits in the TABSR register
Figure 17.1
Three-Phase Motor Control Timer Function Block Diagram 1
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
INV00
Timer B2 underflow
0
f1 or f2
1/2
1
INV12
INV07
Transfer trigger
TA41 register
Timer A4 reload
control signal
(1)
Transfer trigger
Timer A4
one-shot
pulse
TA11 register
Timer A1 reload
Trigger
control signal
Timer A1
one-shot
pulse
TA21 register
Timer A2 reload
control signal
Timer A2
one-shot
pulse
17. Three-Phase Motor Control Timer Function
INV13
Circuit to set interrupt
INV01
generation frequency
INV11
1
0
PWCON
DTT register
Reload register
n = 1 to 255
Trigger
INV06
(1)
Dead time
timer
INV16
n = 1 to 255
Trigger
0
1
U-phase output
control circuit
DU1
DU0
bit
bit
D Q
D Q
U-phase
T
T
output signal
DUB1
DUB0
bit
bit
D Q
D Q
T
T
U-phase
output signal
Trigger
INV06
Dead time timer
n = 1 to 255
V-phase
V-phase output
output signal
control circuit
V-phase
output signal
Trigger
INV06
Trigger
Dead Time Timer
n = 1 to 255
W-phase output
W-phase
output signal
control circuit
W-phase
output signal
ICTB2 register
n = 1 to 15
Timer B2
ICTB2 counter
interrupt
n = 1 to 15
request bit
INV15
To (B) in
block
diagram 2
D Q
(U-phase)
T
Three-phase
output
shift register
(U-phase)
(U-phase)
D Q
T
INV15
(V-phase)
D Q
T
(V-phase)
D Q
T
INV15
(W-phase)
D Q
T
(W-phase)
D Q
T
Page 306 of 803
To (A) in
block
diagram 2

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