Renesas M16C/50 Series User Manual page 650

M16C/5L Group, M16C/56 Group
Figure 23.44 shows the operational example of data frame reception in overrun mode.
This example shows the operation of overrunning the second message when the CAN module receives
two consecutive CAN messages that matches the receiving conditions of the C0MCTL0 register.
SOF
CAN bus
RECREQ
INVALDATA
NEWDATA
MSGLOST
CAN0
reception
complete
interrupt
RECST
CAN0 error
interrupt
RECREQ, INVALDATA, NEWDATA, MSGLOST: Bits in the C0MCTLj register (j = 0 to 31)
RECST: Bit in the C0STR register
Figure 23.44 Operation Example of Data Frame Reception in Overrun Mode
(1) to (5) are the same as overwrite mode.
(6) In overrun mode, if the next message has been received before the NEWDATA bit is set to 0, the
MSGLOST bit in the C0MCTLj register (j = 0 to 31) is set to 1 (message has been overrun). The
new received message is discarded and a CAN0 error interrupt request is generated if the
corresponding interrupt enable bit in the C0EIER register is set to 1 (interrupt enabled).
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
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23. CAN Module
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