Renesas M16C/50 Series User Manual page 272

M16C/5L Group, M16C/56 Group
15.2.3 Timer AB Division Control Register 0 (TCKDIVC0)
Timer AB Division Control Register 0
b7 b6 b5 b4 b3 b2 b1
0 0 0 0 0 0
TCDIV00 (Clock select prior to timer AB division bit) (b0)
Set the TCDIV00 bit while timers A and B are stopped.
Set the TCDIV00 bit before setting other registers associated with timer A.
After changing the TCDIV00 bit, set other registers associated with timer A again.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0 Symbol
TCKDIVC0
Bit Symbol Bit Name
Clock select prior to timer AB
TCDIV00
division bit
—
Reserved bits
(b2-b1)
—
No register bit. If necessary, set to 0. The read value is undefined.
(b3)
—
Reserved bits
(b7-b4)
Address
01CBh
Function
0 : f1
1 : fOCO-F
Set to 0
Set to 0
15. Timer A
Reset Value
0000 X000b
RW
RW
RW
—
RW
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