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Renesas M16C/50 Series User Manual page 864

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REVISION HISTORY
Rev.
Date
1.00
Jan. 31, 2010
M16C/5L Group, M16C/56 Group Hardware Manual
Page
Table 27.3 "Recommended Operating Conditions (2/2)
708
Waveform" added
Table 27.4 "A/D Conversion Characteristics
709
added
Table 27.5 "CPU Clock When Operating Flash Memory (f
710
modified to "one wait"
Table 27.6 "Flash Memory (Program ROM 1, 2) Electrical Characteristics" conditions for read
711
voltage added
Table for "Low Voltage Detection Circuit Electrical Characteristics" replaced by Table 27.8
713
"Voltage Detector 0 Electrical Characteristics" and Table 27.9 "Voltage Detector 2 Electrical
Characteristics"
Figure 27.4 "Power-On Reset Circuit Electrical Characteristics" t
714
Table 27.11 "Power Supply Circuit Timing Characteristics" moved to below Figure 27.4;
714
"t
" deleted (moved to Table 27.8 and Table 27.9); Maximum value for t
d(E-A)
715
Figure 27.5 "Power Supply Circuit Timing Diagram" "VC26" modified to "VC25"
Table 27.12 "On-chip Oscillator Oscillation Circuit Electrical Characteristics" conditions added
715
below the table title; Minimum value and maximum value for f
J-Version, VCC = 5 V
Table 27.13 "Electrical Characteristics (1)" Parameter for V
716
"TA2OUT" modified to "SCL2, SDA2", and "TA0OUT" respectively; "ZP, IDU, IDW, IDV, SD,
INPC1_0 to INPC1_7, CRX0" added
Table 27.14 "Electrical Characteristics (2)" "During flash memory program" and "During flash
717
memory erase" added
27.2.2.1 "Reset Input ( RESET Input)" added
718
Figure 27.7 "External Clock Input (XIN Input)" to Figure 27.13 "External Interrupt INTi Input"
718-723
added (replaced Timing Diagram (1) and (2))
722
27.2.2.5 "Timer S Input" added
724
Figure 27.14 "Multi-master I
J-Version, VCC = 3 V
Table 27.29 "Electrical Characteristics (1)", Parameter for V
725
"TA2OUT" modified to "SCL2, SDA2", and "TA0OUT" respectively; "ZP, IDU, IDW, IDV, SD,
INPC1_0 to INPC1_7, CRX0" added
Table 27.30 "Electrical Characteristics (2)" "During flash memory program" and "During flash
726
memory erase" added
27.3.2.1 "Reset Input ( RESET Input)" added
727
Figure 27.16 "External Clock Input (XIN Input)" to Figure 27.22 "External Interrupt INTi Input"
727-732
added (replaced Timing Diagram (1) and (2))
731
27.3.2.5 "Timer S Input" added
733
Figure 27.23 "Multi-master I
K-Version, Common to 3 V and 5 V
734
Table 27.45 "Absolute Maximum Ratings""Analog reference voltage" added; Note 1 added
Table 27.46 "Operating Conditions (1)" "High peak output current" and "Low peak output
735
current" added
Table 27.47 "Recommended Operating Conditions (2/2)
736
Waveform" added
Table 27.48 "A/D Conversion Characteristics
737
3 added
Table 27.50 "Flash Memory (Program ROM 1, 2) Electrical Characteristics" conditions for read
739
voltage added
Table for "Low Voltage Detection Circuit Electrical Characteristics" replaced by Table 27.52
741
"Voltage Detector 0 Electrical Characteristics" and Table 27.53 "Voltage Detector 2 Electrical
Characteristics"
Figure 27.27 "Power-On Reset Circuit Electrical Characteristics" t
742
Table 27.55 "Power Supply Circuit Timing Characteristics" moved to below Figure 27.25;
742
"t
" deleted; Maximum value for t
d(E-A)
743
Figure 27.28 "Power Supply Circuit Timing Diagram" "VC26" modified to "VC25"
Table 27.56 "On-chip Oscillator Oscillation Circuit Electrical Characteristics" conditions added
743
below the table title; Minimum value and maximum value for f
Revision History
(1)
" "A/D operating clock frequency" added; Note 3
2
C-bus" the title changed
2
C-bus" the title changed
(1)
" "A/D operating clock frequency" added; Note
changed
d(W-S)
C- 24
(1)
" added; Figure 27.2 "Ripple
)" "(wait state)" in note 2
(BCLK)
modified
fth
changed
d(W-S)
changed
OCO40M
V
modified: "SCL, SDA", and
T+-
T-
V
modified: "SCL, SDA", and
T+-
T-
(1)
" added; Figure 27.25 "Ripple
modified
fth
changed
OCO40M

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