Renesas M16C/50 Series User Manual page 103

M16C/5L Group, M16C/56 Group
6.4 Operations
6.4.1 Status after Reset
The status of SFRs after reset depends on the reset type. See the Reset Value column in 4. "Special
Function Registers (SFRs)". Table 6.7 lists Pin Status When RESET Pin Level is Low, Figure 6.2 shows
CPU Register Status after Reset, and Figure 6.3 shows Reset Sequence.
Pin Status When RESET Pin Level is Low
Table 6.7
Pin Name
P0 to P3, P6 to P10
Note:
1. The pin status shown here is when the internal power supply voltage has stabilized after power-on.
The pin status is undefined until td(P-R) has elapsed after power-on.
b19
Content of addresses FFFFEh to FFFFCh
b15
IPL
Figure 6.2 CPU Register Status after Reset
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Input port (high-impedance)
b15
0000h
0000h
0000h
0000h
0000h
0000h
0000h
00000h
b15
0000h
0000h
0000h
b15
0000h
b8 b7
U I O
Status
b0
b0
b0
b0
b0
B S Z D C
(1)
Data register (R0)
Data register (R1)
Data register (R2)
Data register (R3)
Address register (A0)
Address register (A1)
Frame base register (FB)
Interrupt table register (INTB)
Program counter (PC)
User stack pointer (USP)
Interrupt stack pointer (ISP)
Static base register (SB)
Flag register (FLG)
6. Resets
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