Renesas M16C/50 Series User Manual page 254

M16C/5L Group, M16C/56 Group
14.2.4 DMAi Control Register (DMiCON) (i = 0 to 3)
DMAi Control Register (i = 0 to 3)
b7 b6 b5 b4 b3 b2 b1
DMAS (DMA request bit) (b2)
Conditions to become 0:
•
Set the bit to 0.
•
Start data transfer
Condition to become 1:
•
Set the bit to 1.
DMAE (DMA enable bit) (b3)
Conditions to become 0:
•
Set the bit to 0.
•
The DMA transfer counter underflows (single transfer mode).
Condition to become 1:
•
Set the bit to 1.
DSD (Source address direction select bit) (b4)
DAD (Destination address direction select bit) (b5)
Set the DAD bit and/or DSD bit to 0 (address direction fixed).
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
DM0CON
DM1CON
DM2CON
DM3CON
Bit Symbol Bit Name
DMBIT Transfer unit bit select bit
Repeat transfer mode select
DMASL
bit
DMAS DMA request bit
DMAE DMA enable bit
Source address direction
DSD
select bit
Destination address direction
DAD
select bit
—
No register bits. If necessary, set to 0. The read value is 0
(b7-b6)
Address
018Ch
019Ch
01ACh
01BCh
Function
0 : 16 bits
1 : 8 bits
0 : Single transfer
1 : Repeat transfer
0 : DMA not requested
1 : DMA requested
0 : DMA disabled
1 : DMA enabled
0 : Fixed
1 : Forward
0 : Fixed
1 : Forward
14. DMAC
Reset Value
0000 0X00b
0000 0X00b
0000 0X00b
0000 0X00b
RW
RW
RW
RW
RW
RW
RW
—
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