Renesas M16C/50 Series User Manual page 208

M16C/5L Group, M16C/56 Group
12.2.2 Interrupt Control Register 1
(BCNIC/TMOSIC, DM0IC to DM3IC, KUPIC,ADIC, S0TIC to S2TIC, S0RIC to
S3RIC, TA0IC to TA4IC, TB0IC to TB2IC, S4TIC/RTCCIC, S4RIC,
C0WIC,S3TIC/C0EIC, RTCTIC C0RIC, C0TIC, C0FRIC, C0FTIC, ICOC0IC,
ICOCH0IC, ICOC1IC/IICIC, ICOCH1IC/SCLDAIC, ICOCH2IC to ICOCH3IC,
BTIC)
Interrupt Control Register 1
b7 b6 b5 b4 b3 b2 b1
Symbol
BCNIC/TMOSIC
DM0IC
DM1IC
DM2IC
DM3IC
KUPIC
ADIC
S0TIC
S1TIC
S2TIC
S0RIC
S1RIC
S2RIC
S3RIC
Rewrite these registers at a point where an interrupt request for the corresponding register is not
generated.
When multiple interrupt sources share the register, select an interrupt source in registers IFSR2A and
IFSR3A.
IR (Interrupt request bit) (b3)
Do not set the IR bit to 1 when it is 0.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Symbol
b0
Refer to the table below for symbols and addresses.
Bit Symbol Bit Name
ILVL0
Interrupt priority level select
ILVL1
bit
ILVL2
IR Interrupt request bit
—
No register bits. If necessary, set to 0. The read value is undefined.
(b7-b4)
Address
004Ah
004Bh
004Ch
0069h
006Ah
004Dh
004Eh
0051h
0053h
S4TIC/RTCCIC
004Fh
0052h
0054h S3TIC/C0EIC
0050h
0073h
Address
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0: Interrupt not requested
1: Interrupt requested
Symbol Address
TA0IC 0055h
TA1IC 0056h
TA2IC 0057h
TA3IC 0058h
TA4IC 0059h
TB0IC 005Ah
TB1IC 005Bh
TB2IC 005Ch
006Fh
S4RIC 0070h
C0WIC 0071h
0072h
12. Interrupts
Reset Value
XXXX X000b
Function
Symbol Address
RTCTIC 0074h
C0RIC 0075h
C0TIC 0076h
C0FRIC 0077h
C0FTIC 0078h
ICOC0IC 0079h
ICOCH0IC 007Ah
ICOC1IC/IICIC 007Bh
ICOCH1IC/SCLDAIC 007Ch
ICOCH2IC 007Dh
ICOCH3IC 007Eh
BTIC 007Fh
Page 171 of 803
RW
RW
RW
RW
RW
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