Renesas M16C/50 Series User Manual page 129

M16C/5L Group, M16C/56 Group
Table 8.2 I/O Pins
Pin Name
XIN
XOUT
XCIN
XCOUT
CLKOUT
Note:
1. Set the port direction bits which share pins to 0 (input mode).
8.2 Registers
Table 8.3 Registers
Address
0006h System Clock Control Register 0
0007h System Clock Control Register 1
000Ch Oscillation Stop Detection Register
0012h Peripheral Clock Select Register
001Ch PLL Control Register 0
001Eh Processor Mode Register 2
0022h 40 MHz On-Chip Oscillator Control Register 0
0024h 40 MHz On-Chip Oscillator Control Register 2
Note:
1. Bits CM20, CM21, and CM27 remain unchanged at oscillator stop detect reset.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
I/O
Input
I/O pins for the main clock oscillator
Output
(1)
Input
I/O pins for a sub clock oscillator
(1)
Output
Output Clock output
Register
Function
Symbol Reset Value
CM0 0100 1000b
CM1 0010 0000b
CM2
0X00 0010b
PCLKR 0000 0011b
PLC0 0X01 X010b
PM2 XX00 0X01b
FRA0 XXXX XX00b
FRA2 0XX0 X000b
8. Clock Generator
(1)
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