Renesas M16C/50 Series User Manual page 261

M16C/5L Group, M16C/56 Group
14.3.4 DMAC Transfer Cycles
The formula for calculating the number of DMAC transfer cycles is shown below.
Number of transfer cycles per transfer unit = Number of read cycles × j + Number of write cycles × k
Table 14.8 DMAC Transfer Cycles
Transfer Unit
8-bit transfers
(DMBIT = 1)
16-bit transfers
(DMBIT = 0)
DMBIT: Bit in the DMiCON register (i = 0 to 3)
Table 14.9 Coefficients j and k
No waits inserted
j 1
k 1
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Access Address
Number of Read
Even
Odd
Even
Odd
Internal Area
Internal ROM, RAM
Wait inserted
Single-Chip Mode
Number of Write
Cycles Cycles
1 1
1 1
1 1
2 2
one wait inserted
2
2
SFR
2
2
14. DMAC
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