Renesas M16C/50 Series User Manual page 140

M16C/5L Group, M16C/56 Group
8.2.8 40 MHz On-Chip Oscillator Control Register 2 (FRA2)
40 MHz On-Chip Oscillator Control Register 2
b7 b6 b5 b4 b3 b2 b1
0 0
Set the FRA2 register after the PRC0 bit in the PRCR register is set to 1 (write enabled).
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0 Symbol
FRA2
Bit Symbol Bit Name
FRA20
40 MHz on-chip oscillator division
FRA21
select bit
FRA22
—
No register bit. If necessary, set to 0. The read value is undefined.
(b3)
—
Reserved bit
(b4)
—
No register bits. If necessary, set to 0. The read value is undefined.
(b6-b5)
—
Reserved bit
(b7)
Address
0024h
Function
b2 b1 b0
0 0 0: Divide-by-2 mode
0 1 0: Divide-by-4 mode
1 1 0: Divide-by-8 mode
Other than the above : Do not set
Set to 0.
Set to 0.
8. Clock Generator
Reset Value
0XX0 X000b
RW
RW
RW
RW
—
RW
—
RW
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