Renesas M16C/50 Series User Manual page 558

M16C/5L Group, M16C/56 Group
22.2.9 I2C0 Status Register 1 (S11)
I2C0 Status Register 1
b7 b6 b5 b4 b3 b2 b1
AAS0 (Slave address 0 compare flag) (b0)
AAS1 (Slave address 1 compare flag) (b1)
AAS2 (Slave address 2 compare flag) (b2)
When the ALS bit in the S1D0 register is 0 (addressing format), any slave address stored in bits SAD6
to SAD0 in the S0Di register (i = 0 to 2) is compared with the received slave address. The compare
result is shown in the AASi bit. The AASi bit becomes 1 when there is an address match or when a
general call address is received.
The AAS0 bit is enabled when the MSLAD bit in the S4D0 register is 0 (S0D0 register only). Bits AAS2
to AAS0 are enabled when the MSLAD bit is 1 (registers S0D0 to S0D2).
Conditions to become 0:
•
The ES0 bit in the S1D0 register is set to 0 (I
•
The IHR bit in the S1D0 register is set to 1 (I
•
The S00 register is written.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Symbol
b0
S11
Bit Symbol Bit Name
AAS0 Slave address 0 compare flag
AAS1 Slave address 1 compare flag
AAS2 Slave address 2 compare flag
—
No register bits. If necessary, set to 0. The read value is undefined.
(b7-b3)
22. Multi-master I
Address
02B9h
Function
0: No address matched
1: Address matched
0: No address matched
1: Address matched
0: No address matched
1: Address matched
2
C interface disabled).
2
C interface reset).
2
C-bus Interface
Reset Value
XXXX X000b
RW
RO
RO
RO
—
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