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REVISION HISTORY
Rev.
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1.10 Sep. 01, 2011
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Power Control
Chap. 9.
119
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M16C/5L, M16C/56 Group User's Manual: Hardware
8.2.2 System Clock Control Register 1 (CM1):
• CM10 bit explanation: Rewrote the condition for the bit to remain unchanged as a bulleted list,
and added the last two conditions to the list.
• CM13 bit explanation: Changed the description for connection between XIN and XOUT.
• CM14 and CM15 explanation: Rewritten.
8.2.6 Processor Mode Register 2 (PM2):
• Corrected "CM20 register" typo to "CM2 register" in the PM21 bit explanation.
• Changed the name of the PM21 bit from "System clock protect bit" to "System clock protection
bit".
• Changed the name of the PM25 bit from "Peripheral clock fC enable bit" to "Peripheral clock fC
provide bit".
8.2.7 40 MHz On-Chip Oscillator Control Register 0 (FRA0):
Changed the name of the FRA01 bit from "40-MHz on-chip oscillator select bit" to "On-chip
oscillator select bit".
8.3.1 Main Clock:
• Changed "oscillator" to "ceramic resonator or crystal".
• Changed the description in the parenthesis in To start the main clock oscillation, (3).
Figure 8.2 Main Clock Connection Example: Rewrote note 1.
8.3.2 PLL Clock: Changed the explanation of how to generate the PLL clock from the main clock.
Figure 8.3 Relation between Main Clock and PLL Clock: Changed note 2.
8.3.4 fOCO-F: Changed the description for the clock division of 40 MHz.
8.3.5 125 kHz On-Chip Oscillator Clock (fOCO-S): Added the description for when the CSPRO bit
in the CSPR register is 1 to the first paragraph.
Figure 8.4 Sub Clock Connection Example: Changed the title.
8.4.1 CPU Clock and BCLK:
• Added "fOCO-F" to the third paragraph.
• Deleted the description for the clock division when fOCO-F is selected as the clock source for
the CPU clock.
• Changed the description for when the CM06 bit becomes 1.
8.4.2 Peripheral Function Clocks (f1, fOCO40M, fOCO-F, fOCO-S, fC32, fC, Main Clock):
• Changed "fOCO-F divided by 2, 4, or 8" to "fOCO-F divided by 1 (no division)".
• Deleted the A/D converter from the functions which can use fOCO-F.
• Added the description about the PM25 bit to the explanation of fC.
• Added descriptions regarding the main clock.
Figure 8.5 Peripheral Function Clocks: Revised
Table 8.6 Oscillator Stop/Restart Detect Function Specifications: Changed descriptions in the Item
column.
8.7.1 Operation When CM27 Bit is 0 (Oscillator Stop Detect Reset):
Added "voltage monitor 0 reset" to the description for status cancellation.
8.7.3 Using the Oscillator Stop/Restart Detect Function:
Moved the explanations to 8.8 Interrupt except the one for after detected oscillation stop.
8.8 Interrupt: Added.
8.9.5 PLL Frequency Synthesizer:
Changed "to meet the power supply ripple standard" to "within the acceptable range of power
supply ripple".
Figure 8.11 Voltage Fluctuation Timing: Changed the range of f
Changed terminologies are as follows:
• "fOCO-S" to "125 kHz on-chip oscillator" (distinguished between signal name and circuit name)
• "fOCO-F" to "40 MHz on-chip oscillator" (distinguished between signal name and circuit name)
9.2.1 Flash Memory Control Register 0 (FMR0): Changed the bit explanations for FMR01 and
FMSTP.
9.2.2 Flash Memory Control Register 2 (FMR2):
FMR23 bit explanation: Rewrote and added usage restrictions.
Description
Summary
C- 3
.
(ripple)
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