Renesas M16C/50 Series User Manual page 291

M16C/5L Group, M16C/56 Group
Event Counter Mode (When Not Using Two-Phase Pulse Signal Processing)
Timer Ai Mode Register (i = 0 to 4)
b7 b6 b5 b4 b3 b2 b1
0 0 0
MR1 (Count polarity select bit) (b3)
This bit is enabled when bits TAiTGH to TAiTGL in the ONSF or TRGSR register are 00b (TAiIN pin
input).
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0 Symbol
1
TA0MR to TA4MR
Bit Symbol Bit Name
TMOD0
Operation mode select bit
TMOD1
Pulse output function
MR0
select bit
MR1 Count polarity select bit
MR2 Set to 0 in event counter mode
MR3 Set to 0 in event counter mode
Count operation type
TCK0
select bit
TCK1 Can be 0 or 1 when not using two-phase pulse signal processing
Address
0336h to 033Ah
Function
b1 b0
0 1 : Event counter mode
0 : Pulse is not output
(TAiOUT pin functions as I/O port)
1 : Pulse is output
(TAiOUT pin functions as pulse output pin)
0 : Counts falling edge of an external signal
1 : Counts rising edge of an external signal
0 : Reload type
1 : Free-run type
15. Timer A
Reset Value
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
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