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Renesas M16C/50 Series User Manual page 127

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M16C/5L Group, M16C/56 Group
8.
Clock Generator
8.1
Introduction
The clock generator generates operating clocks for the CPU and peripheral functions. The following
circuits are incorporated to generate the system clock signals.
Main clock oscillator
PLL frequency synthesizer
40 MHz on-chip oscillator
125 kHz on-chip oscillator
Sub clock oscillator
Table 8.1 lists the specifications of the clock generator, and Figure 8.1 shows the block diagram of system
clock generator.
Table 8.1
Clock Generator Specifications
Main Clock
Item
Oscillator
• CPU clock
source
Application
• Peripheral
function clock
source
Clock frequency
• Ceramic
Connectable
resonator
oscillators
• Crystal
Pins connecting
XIN, XOUT
to oscillator
Oscillator start/
stop function
Oscillator status
Oscillating
after reset
An externally
Other
generated clock
can be input.
Note:
1.
The PLL frequency synthesizer uses the main clock oscillator as a reference clock source. The items
above are based on the main clock oscillator.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
PLL Frequency
Synthesizer
• CPU clock
source
• Peripheral
function clock
source
f(XIN)
f(PLL)
(see note 1)
-
(see note 1)
-
Enabled
Enabled
Stopped
(see note 1)
-
On-Chip Oscillator
40 MHz on-chip
125 kHz on-chip
oscillator
• CPU clock source
• CPU clock source
• Peripheral function
• Peripheral
clock source
function clock
• CPU and peripheral
source
function clock
• CPU and
sources when the
peripheral
main clock stops
function clock
oscillating
sources when the
• Watchdog timer count
main clock stops
source when the CPU
oscillating
clock is stopped
fOCO40M
-
-
Enabled
Stopped
-
8. Clock Generator
Sub Clock
Oscillator
oscillator
• CPU clock
source
• Peripheral
function clock
source
fOCO-S
f(XCIN)
-
Crystal
-
XCIN, XCOUT
Enabled
Enabled
Oscillating
Stopped
-
Page 90 of 803
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