Renesas M16C/50 Series User Manual page 485

M16C/5L Group, M16C/56 Group
21.2.12 UART2 Special Mode Register (U2SMR)
UART2 Special Mode Register
b7 b6 b5 b4 b3 b2 b1
0
BBS (Bus busy flag) (b2)
The BBS bit is set to 0 by a program. (It remains unchanged even if 1 is written.)
SSS (Transmit start condition select bit) (b6)
When a transmission starts, the SSS bit becomes 0 (not synchronized to RXD2).
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Symbol
b0
U2SMR
Bit Symbol Bit Name
2
IICM I C mode select bit
Arbitration lost detect flag
ABC
control bit
BBS Bus busy flag
—
Reserved bit
(b3)
Bus collision detect sampling
ABSCS
clock select bit
Auto clear function select bit
ACSE
of transmit enable bit
Transmit start condition
SSS
select bit
—
No register bit. If necessary, set to 0. Read as undefined value
(b7)
21. Serial Interface UARTi (i = 0 to 4)
Address
0267h
Function
2
0 : Other than I C mode
2
1 : I C mode
0 : Update every bit
1 : Update every byte
0 : Stop-condition detected
1 : Start-condition detected (busy)
Set to 0
0 : Rising edge of transmit/receive clock
1 : Underflow signal of timer A0
0 : No auto clear function
1 : Auto clear at bus collision
0 : Not synchronized to RXD2
1 : Synchronized to RXD2
Reset Value
X000 0000b
RW
RW
RW
RW
RW
RW
RW
RW
—
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