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M16C/5L Group, M16C/56 Group
BSY bit
TCSTF bit
in RTCCR1 register
RTCSEC
RTCMIN
RTCHR
RTCPM bit
IR bit in RTCCIC register
IR bit in RTCTIC register
RTCOUT pin output
The above assumes the following:
The TOENA bit in the RTCCR1 register is 1 (compare output enabled).
Bits RTCCMP1 to RTCCMP0 in the RTCCR2 register are 11b (compare mode 3).
Bits SEIE, MNIE, and HRIE in the RTCCR2 register are 1 (compare by seconds, minutes, and hours.
Interrupt enabled).
Bits SCMP12 to SCMP10 and SCMP03 to SCMP00 in the RTCCSEC register are 4 and 5, respectively
(second setting: 45).
Bits MCMP12 to MCMP10 and MCMP03 to MCMP00 in the RTCCMIN register are 2 and 3, respectively
(minute setting: 23).
Bits HCMP11 to HCMP10 and HCMP03 to HCMP00 in the RTCCHR register are 0 and 1, respectively
(hour setting: 1).
The PMCMP bit in the RTCCHR register is 0 (a.m.).
BSY bit: Bit in RTCSEC register
RTCSEC: Bits SC12 to SC10 and SC03 to SC00 in RTCSEC register
RTCMIN: Bits MN12 to MN10 and MN03 to MN00 in RTCMIN register
RTCHR: Bits HR11 to HR10 and HR03 to HR00 in RTCHR register
RTCPM bit: Bit in RTCCR1 register
Figure 20.10 Compare Mode 3 Operating Example
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Count stopped
Compare match
44
Undefined
23
Undefined
1
Undefined
0
Undefined
Output polarity inverted
0
Set back to the reset value
0
0
0
Set to 0 by accepting an interrupt request, or
by a program.
20. Real-Time Clock
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