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M16C/5L Group, M16C/56 Group
26.8.7
Status Register
The status register indicates flash memory operating state and whether or not an erase or program
operation has been completed as expected.
Bits FMR00, FMR06, and FMR07 in the FMR0 register indicate status register states. Refer to 26.3.1
"Flash Memory Control Register 0 (FMR0)" for a description of each bit.
Table 26.17
Difference in Reading of Status Register
Item
FMR0 register
Condition
No limit
Reading
Read bits FMR00, FMR06,
procedure
and FMR07 in the FMR0
register
Table 26.18
Status Register
Bits in Status
Bit in FMR0
Register
Register
SR0 (D0)
SR1 (D1)
SR2 (D2)
SR3 (D3)
SR4 (D4)
FMR06
SR5 (D5)
FMR07
SR6 (D6)
SR7 (D7)
FMR00
D0 to D7: The data buses read when the read status register command is executed.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Status
-
Reserved
-
Reserved
-
Reserved
-
Reserved
Program status
Erase status
-
Reserved
Sequencer status
Command
• Read any even address in program ROM 1, program
ROM 2, or data flash after writing the read status register
command.
• Read any even address in program ROM 1, program
ROM 2, or data flash after executing the program
command, block erase command, lock bit program
command, or block blank check command before
executing the read array command.
Status
0
-
-
-
-
Completed as
expected
Completed as
expected
-
Busy
26. Flash Memory
Reset Value
1
-
-
-
-
Completed in error
Completed in error
-
Ready
Page 688 of 803
-
-
-
-
0
0
-
1
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