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M16C/5L Group, M16C/56 Group
Internal RAM
Capacity
XXXXXh
4 KB
013FFh
8 KB
023FFh
12 KB
033FFh
20 KB
053FFh
Internal ROM
Capacity
YYYYYh
64 KB
F0000h
96 KB
E8000h
128 KB
E0000h
256 KB
C0000h
The above assumes the following:
-The PM10 bit in the PM1 register is set to 1 (addresses from 0E000h to 0FFFFh are used as data flash)
-The PRG2C0 bit in the PRG2C register is set to 0 (program ROM 2 enabled)
Notes:
1. Do not access these reserved areas.
2. Do not change the data from FFh.
Figure 3.1
Memory Map
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
00000h
SFRs
00400h
Internal RAM
XXXXXh
(1)
Reserved
0D000h
SFRs
0D800h
(1)
Reserved
0E000h
Internal ROM
(Data flash)
10000h
Internal ROM
(Program ROM 2)
14000h
(1)
Reserved
YYYYYh
Internal ROM
(Program ROM 1)
FFFFFh
13000h
On-chip debugger
monitor area
13FF0h
User boot code area
13FFFh
Relocatable vector table
256 bytes beginning with the start
address set in the INTB register
FFE00h
Special page vector
table
FFFD8h
(2)
Reserved
FFFDBh
Fixed vector table
ID code address
OFS1 address
OFS2 address
FFFFFh
3. Memory
Page 23 of 803
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