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M16C/5L Group, M16C/56 Group
8.2.2
System Clock Control Register 1 (CM1)
System Clock Control Register 1
b7
b6 b5 b4
b3
b2
b1
0
Rewrite the CM1 register after setting the PRC0 bit in the PRCR register to 1 (write enabled).
See Table 9.3 "Clock-Related Bit Setting and Modes" to select a clock and a mode.
CM10 (All clock stop control bit) (b0)
When the CM11 bit is 1 (PLL clock), or the CM20 bit in the CM2 register is 1 (oscillator stop/restart
detect function enabled), do not set the CM10 bit to 1.
In the following cases, this bit remains unchanged even when written to (The MCU does not enter stop
mode).
•
The PM21 bit in the PM2 register is 1 (clock change disabled).
•
The CSPRO bit in the CSPR register is 1 (watchdog timer count source protection mode enabled).
•
The PLC07 bit in the PLC0 register is 1 (PLL on).
A low is input to the NMI pin.
•
CM11 (System clock select bit) (b1)
The CM11 bit is valid when the CM21 bit in the CM2 register is set to 0 (main clock or PLL clock).
The CPU clock source and the peripheral function clock f1 can be selected by the CM11 bit when the
CM07 bit is 0 (main clock, PLL clock, or on-chip oscillator clock used as CPU clock). The peripheral
function clock f1 can be selected by the CM11 bit when the CM07 bit is 1 (sub clock used as CPU
clock).
When the PM21 bit in the PM2 register is 1 (clock change disabled), the CM11 bit remains unchanged
even when written to.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
CM1
Bit Symbol
Bit Name
CM10
All clock stop control bit
CM11
System clock select bit 1
—
Reserved bit
(b2)
XIN-XOUT feedback resistor
CM13
select bit
125 kHz on-chip oscillator stop
CM14
bit
XIN-XOUT drive capacity
CM15
select bit
CM16
Main clock division select bit 1
CM17
Address
0007h
Function
0 : Clock on
1 : All clocks off (stop mode)
0 : Main clock
1 : PLL clock
Set to 0
0 : Internal feedback resistor connected
1 : Internal feedback resistor not connected
0 : 125 kHz on-chip oscillator on
1 : 125 kHz on-chip oscillator off
0 : Low
1 : High
b7 b6
0 0 : No division mode
0 1 : Divide-by-2 mode
1 0 : Divide-by-4 mode
1 1 : Divide-by-16 mode
8. Clock Generator
Reset Value
0010 0000b
RW
RW
RW
RW
RW
RW
RW
RW
Page 95 of 803
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