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Renesas M16C/50 Series User Manual page 234

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M16C/5L Group, M16C/56 Group
12.13.5 Rewriting the Interrupt Control Register
To modify the interrupt control register, follow either of the procedures below:
Modify in places where no interrupt requests corresponding to the interrupt control register may
occur.
If an interrupt request can be generated, disable that interrupt and then rewrite the interrupt control
register.
When using the I flag to disable an interrupt, set the I flag as shown in the sample program code below.
(Refer to 12.13.6 "Instruction to Rewrite the Interrupt Control Register" for rewriting the interrupt control
registers using the sample program code.)
Examples 1 through 3 show how to prevent the I flag from becoming 1 (interrupt enabled) before the
contents of the interrupt control register is rewritten, owing to the effects of the internal bus and the
instruction queue buffer.
Example 1: Using the NOP instruction to pause the program until the interrupt control register is
modified
INT_SWITCH1:
FCLR
AND.B
NOP
NOP
FSET
Example 2: Using a dummy read to delay the FSET instruction
INT_SWITCH2:
FCLR
AND.B
MOV.W
FSET
Example 3: Using the POPC instruction to change the I flag
INT_SWITCH3:
PUSHC
FCLR
AND.B
POPC
12.13.6 Instruction to Rewrite the Interrupt Control Register
Do not use the BTSTC and BTSTS instructions to rewrite the interrupt control registers.
Use the AND, OR, BCLR, BSET, or MOV instruction to rewrite interrupt control registers.
When an interrupt request is generated for the register being rewritten while executing an AND,
OR, BCLR, or BSET instruction, the IR bit becomes 1 (interrupt requested) and remains 1.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
I
; Disable interrupts.
#00H, 0055H
; Set the TA0IC register to 00h.
;
I
; Enable interrupts.
I
; Disable interrupts.
#00H, 0055H
; Set the TA0IC register to 00h.
MEM, R0
; Dummy read.
I
; Enable interrupts.
FLG
I
; Disable interrupts.
#00H, 0055H
; Set the TA0IC register to 00h.
FLG
; Enable interrupts.
12. Interrupts
Page 197 of 803

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