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M16C/5L Group, M16C/56 Group
23.1.10 CAN0 Receive FIFO Control Register (C0RFCR)
CAN0 Receive FIFO Control Register
b7 b6 b5 b4
b3
b2
b1
Notes:
1. Write to the C0RFCR register in CAN operation mode or CAN halt mode.
2. Write 0 to the RFE bit simultaneously with the RFMLF bit.
3. Write 0 only. Writing 1 has no effect.
Figure 23.11 C0RFCR Register
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
C0RFCR
Bit Symbol
Receive FIFO
RFE
Enable Bit
Receive FIFO
RFUST
Unread Message Number
Status Bit
Receive FIFO Message
RFMLF
Lost Flag
Receive FIFO Full
RFFST
Status Bit
Receive FIFO Buffer
RFWST
Warning Status Bit
Receive FIFO Empty
RFEST
Status Bit
(1)
Address
D7C8h
Bit Name
0: Receive FIFO disabled
(2)
1: Receive FIFO enabled
b3 b2 b1
0 0 0 : No unread message
0 0 1 : 1 unread message
0 1 0 : 2 unread messages
0 1 1 : 3 unread messages
1 0 0 : 4 unread messages
1 0 1 : Reserved
1 1 0 : Reserved
1 1 1 : Reserved
0: No receive FIFO message lost
has occurred
(3)
1: Receive FIFO message lost
has occurred
0: Receive FIFO is not full
1: Receive FIFO is full
(4 unread messages)
0: Receive FIFO is not buffer warning
1: Receive FIFO is buffer warning
(3 unread messages)
0: Unread message in receive
FIFO
1: No unread message in receive
FIFO
23. CAN Module
Reset Value
1000 0000b
Function
RW
RW
RO
RW
RO
RO
RO
Page 570 of 803
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