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M16C/5L Group, M16C/56 Group
8.9.2
Noise Countermeasure
8.9.2.1
Clock I/O Pin Wiring
•
Connect the shortest possible wiring to the clock I/O pin.
•
Connect (a) the capacitor's ground lead connected to the crystal/ceramic resonator, and (b) the
MCU's VSS pin, with the shortest possible wiring (maximum 20 mm).
Figure 8.8
Clock I/O Pin Wiring
Reason:
When noise enters the clock I/O pin, the clock waveform becomes unstable, which causes an error in
operation or a program runaway. Also, if a potential difference attributed to the noise occurs between
the VSS level of the MCU and the VSS level of the crystal/ceramic resonator, an accurate clock is not
input to the MCU.
8.9.2.2
Large Current Signal Line
For large currents that exceed the MCU's current range, wire the signal lines as far away from the
MCU as possible (especially the crystal/ceramic resonator).
Reason:
In the system using the MCU, there are signal lines for controlling motors, LEDs, and thermal heads.
When a large current flows through these signal lines, noise is generated due to mutual inductance.
Figure 8.9
Large Current Signal Line Wiring
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Noise
XIN
VSS
XOUT
Bad
Mutual inductance
M
Large current
GND
XIN
VSS
XOUT
Good
MCU
XIN
VSS
XOUT
8. Clock Generator
Page 115 of 803
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