Renesas M16C/50 Series User Manual page 324

M16C/5L Group, M16C/56 Group
16.2.7 Timer AB Division Control Register 0 (TCKDIVC0)
Timer AB Division Control Register 0
b7 b6 b5 b4 b3 b2 b1
0 0 0 0 0 0
TCDIV00 (Clock select prior to timer AB division bit) (b0)
Set the TCDIV00 bit while timers A and B are stopped.
Set the TCDIV00 bit before setting other registers associated with timer B.
After changing the TCDIV00 bit, set other registers associated with timer B again.
16.2.8 Count Start Flag (TABSR)
Count Start Flag
b7 b6 b5 b4 b3 b2 b1
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Symbol
b0
TCKDIVC0
Bit Symbol Bit Name
Clock select prior to timer AB
TCDIV00
division bit
—
Reserved bits
(b2-b1)
—
No register bit. If necessary, set to 0. The read value is undefined.
(b3)
—
Reserved bits
(b7-b4)
Symbol
b0
TABSR
Bit Symbol Bit Name
TA0S Timer A0 count start flag
TA1S Timer A1 count start flag
TA2S Timer A2 count start flag
TA3S Timer A3 count start flag
TA4S Timer A4 count start flag
TB0S Timer B0 count start flag
TB1S Timer B1 count start flag
TB2S Timer B2 count start flag
Address
01CBh
Function
0 : f1
1 : fOCO-F
Set to 0
Set to 0
Address
0320h
Function
0 : Count stopped
1 : Count started
16. Timer B
Reset Value
0000 X000b
RW
RW
RW
—
RW
Reset Value
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
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