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M16C/5L Group, M16C/56 Group
65535-n
Count started
n
Count
operations
0000h
TAiS bit in the
TABSR register
TAiIN input
TAiOUT output
POFSi = 0
POFSi = 1
IR bit in the
TAiIC register
i = 0 to 4
POFSi: Bit in the TAPOFS register
fj: Count source frequency
The above timing diagram assumes the following:
- The MR0 bit in the TAiMR register = 1 (pulse output)
- The MR3 bit in the TAiMR register = 0 (16-bit PWM mode)
- The MR1 bit in the TAiMR register = 1
- The MR2 bit in the TAiMR register = 1
- Bits TAiTGH to TAiTGL in the ONSF or TRGSR register = 00b
b15
TAi register
Operates as a 16-bit pulse width modulator
Figure 15.11 Operation Example in 16-Bit Pulse Width Modulation Mode
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
65535
n
65535-n
Cannot be a retrigger
after count start
n
65535
fj
fj
Interrupt request generated
- when TAiOUT changes from high to low while POFSi is 0.
- when TAiOUT changes from low to high while POFSi is 1.
Set to 0 by accepting an interrupt request, or by a program.
b0
n
65535
Reload 0000h and
Write 0000h to the TAi
stop counting.
register during this period.
Low-level output
at count stop
Interrupt not requested
The rising edge of the TAiIN pin input is the trigger.
65535
Reload count started
when a value other than
0000h is written.
Count stopped
Becomes 0
by a program
Count stopped
Low-level output
at count stop
High-level output
at count stop
Interrupt request generated:
- When TAiOUT changes
state from high to low while
POFSi is 0.
- When TAiOUT changes
state from low to high while
POFSi is 1. (The IR bit does
not change when output has
no change.)
Page 268 of 803
15. Timer A
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