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Renesas M16C/50 Series User Manual page 833

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M16C/5L Group, M16C/56 Group
28.20.4 A/D Conversion Start
When rewriting the ADSTBY bit in the ADCON1 register from 0 (A/D operation stopped) to 1 (A/D
operation enabled), wait for one φ AD cycle or more before starting A/D conversion.
28.20.5 A/D Operation Mode Change
When the A/D operation mode has been changed, reselect analog input pins by using bits CH2 to CH0
in the ADCON0 register or bits SCAN1 to SCAN0 in the ADCON1 register.
28.20.6 State When Forcibly Terminated
If A/D conversion in progress is halted by setting the ADST bit in the ADCON0 register to 0 (A/D
conversion stopped), the conversion result is undefined. In addition, the unconverted ADi register
(i = 0 to 7) may also become undefined. Do not use any value in ADi registers when setting the ADST
bit to 0 by a program during A/D conversion.
28.20.7 A/D Open-Circuit Detection Assist Function
The conversion result in open-circuit depends on the external circuit. Use this function only after careful
evaluation of the system.
When A/D conversion starts after changing the AINRST register, follow these steps:
(1) Change bits AINRST1 to AINRST0 in the AINRST register.
(2) Wait for one cycle of φ AD.
(3) Set the ADST bit in the ADCON0 register to 1 (A/D conversion started).
28.20.8 Detecting Completion of A/D Conversion
In one-shot mode and single sweep mode, use the IR bit in the ADIC register to detect completion of
A/D conversion. When not using an interrupt, set the IR bit to 0 by a program after detection.
When 1 is written to the ADST bit in the ADCON0 register, the ADST bit becomes 1 (A/D conversion
start) after start processing time elapses (see Table 24.6 "Cycles of A/D Conversion Item"). Therefore
when reading the ADST bit immediately after writing 1, 0 (A/D conversion stop) may be read.
Write 1 to the ADST bit by a program.
ADST bit in the
ADCON0 register
I
R bit in the
ADIC register
Figure 28.13 ADST Bit Operation
28.20.9 φAD
Divide fAD so φ AD conforms to the standard frequency.
In particular, consider the maximum and minimum values of fOCO40M when the CKS3 bit in the
ADCON2 register is 1 (fOCO40M is fAD).
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Start
A/D conversion
processing time
28. Usage Notes
Set to 0 by a program or
acceptance of an interrupt request.
Page 796 of 803

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