Renesas M16C/50 Series User Manual page 102

M16C/5L Group, M16C/56 Group
ROMCR (ROM code protect cancel bit) (b2)
ROMCP1 (ROM code protect bit) (b3)
These bits prevent the flash memory from being read or changed in parallel I/O mode.
Table 6.6 ROM Code Protection
Bit Setting
ROMCR bit
0
0
1
1
Reserved bit (b5)
Set to 0.
LVDAS (Voltage detector 0 start bit) (b6)
Set this bit to 0 (voltage monitor 0 reset enabled after hardware reset) when using the power-on reset.
This bit is enabled in single-chip mode, while disabled in boot mode.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
ROM Code Protection
ROMCP1 bit
0
1
0
1
Cancelled
Enabled
Cancelled
6. Resets
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