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M16C/5L Group, M16C/56 Group
26. Flash Memory
Note
Pins P0_4 to P0_7, P1_0 to P1_4, P3_4 to P3_7, P9_5 to P9_7 cannot be used in the 64-pin
package. For the 64-pin package, do not use these pins for the entry of user boot function.
26.1
Introduction
This product uses flash memory as ROM. In this chapter, flash memory refers to the flash memory inside
the MCU.
In this product, the flash memory can perform in three rewrite modes: CPU rewrite mode, standard serial
I/O mode, and parallel I/O mode.
Table 26.1 lists Flash Memory Specifications (see Table 1.1 to Table 1.4 "Specifications" for the items not
listed in Table 26.1).
Table 26.1
Flash Memory Specifications
Item
Flash memory rewrite modes
Erase block
Program method
Erase method
Program and erase control method
Suspend function
Protect method
Number of commands
Program and erase
cycles
Data retention
Flash memory rewrite disable function
User boot function
Note:
1.
Definition of program and erase cycles:
The program and erase cycles is the number of erase operations performed on a per-block
basis. For example, assume that a 4 KB block is programmed in 1,024 operations, writing
2 words at a time, and erased thereafter. In this case, the block is considered to have been
programmed and erased once.
If the program and erase cycles are 1,000 times, each block can be erased up to 1,000 times.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
3 modes (CPU rewrite, standard serial I/O, and parallel I/O)
Program ROM 1
See Figure 26.1 "Flash Memory Block Diagram".
Program ROM 2
1 block (16 KB)
Data flash
2 blocks (4 KB each)
In 2-word (4-byte) units
Block erase
Program and erase controlled by software commands
Program suspend and erase suspend
A lock bit protects each block.
8
Program ROM 1 and
1,000 times
program ROM 2
Data flash
10,000 times
20 years
Parallel I/O mode
ROM code protect function
Standard serial I/O mode
ID code check function, forced erase function, and standard serial I/O
mode disable function
User boot mode
Specification
(1)
(1)
26. Flash Memory
Page 648 of 803
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