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M16C/5L Group, M16C/56 Group
12.11 Address Match Interrupt
An address match interrupt is generated immediately before executing the instruction at the address
indicated by the RMADi register (i = 0 to 3). Set the start address of any instruction in the RMADi register.
Use bits AIER0 and AIER1 in the AIER register, and bits AIER20 and AIER21 in the AIER2 register to
enable or disable the interrupt. Note that the address match interrupt is unaffected by the I flag and IPL.
When an address match interrupt request is acknowledged, the value of the PC that is saved to the stack
area (refer to 12.7.5 "Saving Registers") varies depending on the instruction at the address indicated by
the RMADi register. (The value of the PC that is saved to the stack area is not the correct return address.)
Therefore, use one of the following methods to return from the address match interrupt:
•
Rewrite the values of the stack and then use the REIT instruction to return.
•
Restore the stack to its previous state by using the POP or similar instructions before the interrupt
request was accepted and then use a jump instruction to return.
Table 12.11
Value of PC Saved on Stack Area When Address Match Interrupt Request Accepted
Instruction at the Address Indicated by the RMADi Register
•
16-bit operation code instructions
•
Instruction shown below among 8-bit operation code instructions
ADD.B:S
#IMM8, dest
OR.B:S
#IMM8, dest
STNZ
#IMM8, dest
CMP.B:S
#IMM8, dest
JMPS
#IMM8
MOV.B:S
#IMM, dest (however, dest = A0 or A1)
Instructions not listed above
Refer to 12.7.5 "Saving Registers" for PC values saved to the stack area.
Table 12.12
Relationship between Address Match Interrupt Sources and Associated Registers
Address Match Interrupt Sources Address Match Interrupt Enable Bit Address Match Interrupt Register
Address match interrupt 0
Address match interrupt 1
Address match interrupt 2
Address match interrupt 3
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
SUB.B:S
#IMM8, dest
MOV.B:S
#IMM8, dest
STZX
#IMM81, #IMM82,dest
PUSHM
src
JSRS
#IMM8
AIER20
AIER21
AND.B:S
#IMM8, dest
STZ
#IMM8, dest
POPM dest
AIER0
AIER1
12. Interrupts
Value of the PC That Is
Saved to the Stack Area
The address
indicated by the
RMADi register +2
The address
indicated by the
RMADi register +1
RMAD0
RMAD1
RMAD2
RMAD3
Page 193 of 803
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