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M16C/5L Group, M16C/56 Group
15.3.6
Pulse Width Modulation (PWM) Mode
In PWM mode, the timer outputs pulses of a given width in succession. The counter functions as either
a 16-bit pulse width modulator or 8-bit pulse width modulator. Table 15.14 lists PWM Mode
Specifications. Table 15.15 lists Registers and the Setting in PWM Mode. Figure 15.11 and Figure
15.12 show Operation Example in 16-Bit Pulse Width Modulation Mode and Operation Example in 8-Bit
Pulse Width Modulation Mode, respectively.
Table 15.14
PWM Mode Specifications
Item
Count sources
Count operations
16-bit PWM
8-bit PWM
Count start condition
Count stop condition
Interrupt request
generation timing
TAiIN pin function
TAiOUT pin function
Read from timer
Write to timer
Selectable functions
i = 0 to 4
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
f1TIMAB, f2TIMAB, f8TIMAB, f32TIMAB, f64TIMAB, fOCO-F, fOCO-S, fC32
•
Decrement (operating as an 8-bit or a 16-bit pulse width modulator)
•
The timer reloads the reload register value at a rising edge of PWM pulse and
continues counting.
•
The timer is not affected by a trigger that occurs during counting.
n
•
Pulse width
-- -
fj
16
(
)
2
1
–
•
Cycle time
----------------------
fj
n: set value of the TAi register
fj: count source frequency
×
(
)
n
m
+
1
•
---------------------------- -
Pulse width
fj
8
(
)
×
(
2
1
m
–
•
Cycle time
--------------------------------------------- -
fj
m: set value of the TAi register lower address
n: set value of the TAi register upper address
fj: count source frequency
•
The TAiS bit of the TABSR register is set to 1 (start counting).
•
The TAiS bit is 1 and external trigger input from the TAiIN pin
•
The TAiS bit is 1 and one of the following triggers occurs
Timer B2 overflow or underflow
Timer Aj overflow or underflow (j = i - 1, except j = 4 if i = 0)
Timer Ak overflow or underflow (k = i + 1, except k = 0 if i = 4)
The TAiS bit is set to 0 (stop counting).
On the falling edge of the PWM pulse
I/O port or trigger input
Pulse output
An undefined value is read when reading the TAi register.
•
When not counting
Value written to the TAi register is written to both the reload register and counter.
•
When counting
Value written to the TAi register is written to only the reload register
(transferred to counter when reloaded next time).
•
Output polarity control
The output polarity of the TAiOUT pin is inverted. (While the TAiS bit is set to 0 (stop
counting), a high-level signal is output).
Specification
n
16
2
- 1
n × (m + 1)
- 1) × (m + 1)
8
(2
)
+
1
15. Timer A
Page 265 of 803
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