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REVISION HISTORY
Rev.
Date
Page
1.10 Sep. 01, 2011
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668-670
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674-676
681
683, 684 26.8.6.4 Program Command, 26.8.6.5 Block Erase Command:
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694, 696
M16C/5L, M16C/56 Group User's Manual: Hardware
26.7 User Boot Mode: Added.
26.7.1 User Boot Function
• Changed "with the input of the selected port" to "with the input level of the selected port" in the
first paragraph below Table 26.6.
• Deleted "The content of the OFS1 address is valid." from the third paragraph below Table 26.6.
Table 26.9 Addresses of Selectable Ports for Entry:
Divided the Address column into columns "13FF9h" and "13FF8h".
Table 26.10 Example Settings of User Boot Code Area: Added.
Figure 26.4 Program Starting Address in User Boot Mode: Added.
Table 26.11 EW0 Mode and EW1 Mode:
• Changed the State during auto write and auto erase row.
• Corrected "FRA0" typo to "FMR0" in the EW0 Mode column of the Flash memory status
detection row.
• Changed note 1.
26.8.1 EW0 Mode:
• Deleted "the flash memory is reset. The flash memory restarts after a certain period of time" from
the third bullet below Figure 26.5.
• Changed the last paragraph.
Table 26.12 Modes after Executing Commands (in EW0 Mode): Added.
Figure 26.6 Program Flowchart in EW0 Mode (Suspend Function Enabled),
Figure 26.7 Block Erase Flowchart in EW0 Mode (Suspend Function Enabled),
Figure 26.8 Lock Bit Program Flowchart in EW0 Mode (Suspend Function Enabled):
• Added "I flag ← 0".
• Moved "I flag ← 1".
• Deleted "Wait td(SR-SUS)".
• Changed "FMR33 = 1 ?" / "FMR32 = 1 ?" to "FMR00 = 1 ?" and its arrow direction.
26.8.2 EW1 Mode:
• Deleted "the flash memory is reset. The flash memory restarts after a certain period of time" from
the third bullet below 26.10.
• Changed the explanation regarding watchdog timer.
Table 26.13 Modes after Executing Commands (in EW1 Mode): Added.
Figure 26.11 Program Flowchart in EW1 Mode (Suspend Function Enabled),
Figure 26.12 Block Erase Flowchart in EW1 Mode (Suspend Function Enabled),
Figure 26.13 Lock Bit Program Flowchart in EW1 Mode (Suspend Function Enabled):
• Added "I flag ← 0".
• Moved "I flag ← 1".
• Changed "the highest-order block address" to "BA address". (Figure 26.13 only)
Table 26.16 Software Commands: Added note 1.
Deleted the description regarding the read status register mode in EW0 mode.
Figure 26.22 Read Lock Bit Status Command:
Changed "FMR16 = 0?" (decision) to "Read the FMR16 bit" (process).
Figure 26.23 Block Blank Check Command:
Changed "FMR07 = 0?" (decision) to "Read the FMR07 bit" (process).
26.8.6.8 Block Blank Check Command: Changed the explanation below Figure 26.23.
Table 26.19 Errors and FMR0 Register States: Changed note 1.
26.8.7.2 Handling Procedure for Errors:
• Changed (4) and the explanation below (4) in the Erase error.
• Moved a part of the explanation of (2) to after (3) in the Program error.
26.9.2 Forced Erase Function: Added "the ROMCR bit in the OFS1 address is 1 (ROMCP1 bit
enabled)" to the first paragraph.
26.9.3 Standard Serial I/O Mode Disable Function: Added "the ROMCR bit in the OFS1 address is
1 (ROMCP1 bit enabled)" to the second paragraph.
Table 26.22, Table 26.24 Pin Functions (Flash Memory Standard Serial I/O Mode 1, 2):
Added the description to the Description column of the VREF row.
C- 13
Description
Summary
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