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Renesas M16C/50 Series User Manual page 157

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M16C/5L Group, M16C/56 Group
9.2.2
Flash Memory Control Register 2 (FMR2)
Flash Memory Control Register 2
b7
b6 b5 b4
b3
b2
b1
0
FMR22 (Slow read mode enable bit) (b2)
This bit enables the mode which reduces the amount of current consumption when reading the flash
memory. When rewriting the flash memory (CPU rewrite mode), set the FMR22 bit to 0 (slow read
mode disabled).
To set the FMR22 bit to 1, write 0 and then 1 in succession. Make sure no interrupts or DMA transfers
occur between writing 0 and 1.
Set the FMR23 bit to 1 (low current consumption read mode enabled) after the FMR22 bit is set to 1
(slow read mode enabled). Also, set the FMR22 bit to 0 (slow read mode disabled) after the FMR23 bit
is set to 0 (low current consumption read mode disabled). Do not change the FMR22 bit and FMR23 bit
at the same time.
FMR23 (Low current consumption read mode enable bit) (b3)
This bit enables the mode which reduces the amount of current consumption when reading the flash
memory. When rewriting the flash memory (CPU rewrite mode), set the FMR23 bit to 0 (low current
consumption read mode disabled).
Low current consumption read mode can be used when the CM07 bit in the CM0 register is 1 (sub
clock used as CPU clock).
To set the FMR23 bit to 1, write 0 and then 1 in succession. Make sure no interrupts or DMA transfers
occur between writing 0 and 1.
Set the FMR23 bit to 1 (low current consumption read mode enabled) after the FMR22 bit is set to 1
(slow read mode enabled). Also, set the FMR22 bit to 0 (slow read mode disabled) after the FMR23 bit
is set to 0 (low current consumption read mode disabled). Do not change bits FMR22 and FMR23 at the
same time.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
0
FMR2
Bit Symbol
Bit Name
Reserved bits
(b1-b0)
Slow read mode enable
FMR22
bit
Low current consumption
FMR23
read mode enable bit
No register bits. If necessary, set to 0. The read value is undefined.
(b7-b4)
Address
0222h
Function
Set to 0
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
9. Power Control
Reset Value
XXXX 0000b
RW
RW
RW
RW
Page 120 of 803

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