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REVISION HISTORY
Rev.
Date
0.70
Oct. 09, 2009
Multi-Master I
A/D Converter
Flash Memory
Electrical Characteristics
712, 735
717, 725
727, 742
740, 748
Usage Notes
1.00
Jan. 31, 2010 The manual in general
Overview
M16C/5L Group, M16C/56 Group Hardware Manual
Page
2
C-bus Interface
504
Table 22.4 "Register List" reset values for S1D0 and S4D0 modified
507
22.2.3 "I2C0 Control Register 0 (S1D0)" reset value modified
514
22.2.6 "I2C0 Control Register 1 (S3D0)" partially modified
519
22.2.7 "I2C0 Control Register 2 (S4D0)" partially modified
532
22.2.7 "I2C0 Control Register 2 (S4D0)" partially modified
628
CKS0 (Frequency Select Bit 0) (b7) partially modified
663
26.3.2 "Flash Memory Control Register 1 (FMR1)" note deleted
663
"FMR11 (Write to FMR6 register enable bit) (b1)" "low" changed to "high"
666
"FMR60 (EW1 mode select bit) (b0)" "low" changed to "high"
667
26.4 "Optional Function Select Area" partially modified
678
26.8.4.4 "Program Command" partially modified
679
26.8.4.5 "Block Erase Command" partially modified
680
26.8.4.6 "Lock Bit Program Command" partially modified
703
26.10.3.2 "CPU Rewrite Mode Select" "low" changed to "high"
Table 27.7 "Low Voltage Detection Circuit Electrical Characteristics" and Table 27.45 "Voltage
Detection Circuit Electrical Characteristics" partially modified
Table 27.17 "Timer A Input (External Trigger Input in Pulse Width Modulation Mode,
716
Programmable Output Mode)" title changed
Table for "A/D Trigger Input" deleted
Table 27.31 "Timer A Input (External Trigger Input in Pulse Width Modulation Mode,
724
Programmable Output Mode)" title changed
Figure 27.8 "Timing Diagram (1)" and Figure 27.15 "Timing Diagram (1)"partially modified
Table 27.55 "Timer A Input (External Trigger Input in Pulse Width Modulation Mode,
739
Programmable Output Mode)" title changed
Table for "A/D Trigger Input" deleted
Table 27.69 "Timer A Input (External Trigger Input in Pulse Width Modulation Mode,
747
Programmable Output Mode)" title changed
761
28.7.2 "Wait Mode" partially modified
28.9.3 " NMI Interrupt" partially modified
764
766
28.9.5 "Rewriting the Interrupt Control Register" partially modified
766
28.9.6 "Instruction to Rewrite the Interrupt Control Register" added
783
28.17.1 "Starting and Stopping Count" partially modified
784
28.17.4 "Time Reading Procedure of Real-Time Clock Mode" partially modified
785
28.18 "Notes on Serial Interface UARTi (i= 0 to 4)" partially modified
28.18.3 "Special Mode (I
786
Conditions" and 28.18.3.2 "IR Bit" added
787
28.19.1 "Limitation on CPU Clock" partially modified
791
28.22.3.2 "CPU Rewrite Mode Select" "low" changed to "high"
—
0019h the register name changed to "Voltage Detector 2 Flag Register"
—
001Ah the register name changed to "Voltage Detector Operation Enable Register"
—
0028h the register name changed to "Voltage Detector 2 Level Select Register"
—
002Ah the register name changed to "Voltage Monitor 0 Control Register"
—
002Ch the register name changed to "Voltage Monitor 2 Control Register"
—
0366h "Port Control Register" the reset value changed
Table 1.2 "Specifications (80-pin Package) (2/2)" and Table 1.4 "Specifications (64-pin
3, 5
Package) (2/2)" note 1 added
1.3 "Product List" Table 1.5 and Table 1.6 the status of products updated; Typos in the part
6
numbers of the M16C/56 Group corrected
Figure 1.3 "M16C/5L Group, M16C/56 Group 80-Pin Block Diagram" and Figure 1.4
8, 9
"M16C/5L Group, M16C/56 Group 64-Pin Block Diagram"
"Voltage detector", "Power-on reset", and "On-chip debugger" added
Revision History
2
C Mode)" modified: 28.18.3.1 "Generating Start and Stop
C- 20
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