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M16C/5L Group, M16C/56 Group
Some interrupts of UART0 to UART4 share interrupt vectors and interrupt control registers with other
peripheral functions. When using these interrupts, select them by interrupt source select registers.
Table 21.25 lists Interrupt Selection in UART0 to UART4.
Table 21.25
Interrupt Selection in UART0 to UART4
UART2 start/stop condition detection, bus collision detection
UART3 transmission
UART4 transmission
UART0 transmission
In the following modes, an interrupt request can be generated by rewriting bit values.
•
Special mode 1 (I
Set the IR bit in the interrupt control register of UART2 to 0 (interrupt not requested), when the
following bits are changed:
Bits SMD2 to SMD0 in the U2MR register, the IICM bit in the U2SMR register, the IICM2 bit in
the U2SMR2 register, the CKPH bit in the U2SMR3 register
•
Special mode 4 (SIM mode)
After reset, a transmit interrupt request is generated by setting bits U2IRS and U2ERE in the U2C1
register to 1 (transmission completed, error signal output), then setting the TE bit to 1 (transmission
enabled) and the transmission data to the U2TB register. Therefore, when using SIM mode, make
sure to set the IR bit to 0 (interrupt not requested) after setting these bits.
21.4.2
Reception Interrupt
•
The case that bits SMD2 to SMD0 in the U2MR register are not set to 010b (I
When the RI bit in the U2C1 register is changed from 0 (no data in the U2RB register) to 1 (data
present in the U2RB register), the IR bit in the S2RIC register is automatically set to 1 (interrupt
requested).
If an overrun error occurs (when the RI bit is 1, the next data is received), the RI bit remains 1,
and therefore, the IR bit in the S2RIC register remains unchanged.
•
The case that bits SMD2 to SMD0 in the U2MR register are set to 010b (I
When the RI bit in the U2C1 register is changed from 0 (no data in the U2RB register) to 1 (data
present in the U2RB register), the IR bit in the S2RIC register is automatically set to 1 (interrupt
requested).
When an overrun error occurs, the IR bit in the S2RIC register also becomes 1.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Interrupt Source
2
C mode)
21. Serial Interface UARTi (i = 0 to 4)
Interrupt Source Select Register Settings
Register
Bit
IFSR2A
IFSR20
IFSR2A
IFSR25
IFSR3A
IFSR36
IFSR4A
IFSR43
2
C mode)
2
C mode)
Setting Value
0
0
0
0
Page 494 of 803
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