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M16C/5L Group, M16C/56 Group
18.2.14 Timer S I/O Control Register 0 (G1IOR0)
Timer S I/O Control Register 0
b7 b6 b5 b4
b3
b2
b1
The value written to this register is reflected to the internal circuit when the clock is synchronized with
the base timer count source (fBT1).
Set the corresponding output control bits IOj1 and IOj0 to 00b for the input channels selected by setting
the FSCj bit (j = 0 to 3) in the G1FS register to 1 (time measurement function is selected).
In SR waveform output mode, set bits IOj1 and IOj0 to 00b for both odd and even channels.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
G1IOR0
Bit Symbol
Bit Name
IO00
OUTC1_0 output control bit
IO01
IO10
OUTC1_1 output control bit
IO11
IO20
OUTC1_2 output control bit
IO21
IO30
OUTC1_3 output control bit
IO31
Address
02EEh
Function
b1 b0
0 0: Outputs high or low, depending on the
mode selected by bits MOD1 and MOD0 in
the G1POCR0 register.
0 1: Outputs low by compare match with the
G1PO0 register.
1 0: Outputs high by compare match with the
G1PO0 register.
1 1: Do not set.
b3 b2
0 0: Outputs high or low, depending on the
mode selected by bits MOD1 and MOD0 in
the G1POCR1 register.
0 1: Outputs low by compare match with the
G1PO1 register.
1 0: Outputs high by compare match with the
G1PO1 register.
1 1: Do not set.
b5 b4
0 0: Outputs high or low, depending on the
mode selected by bits MOD1 and MOD0 in
the G1POCR2 register.
0 1: Outputs low by compare match with the
G1PO2 register.
1 0: Outputs high by compare match with the
G1PO2 register.
1 1: Do not set.
b7 b6
0 0: Outputs high or low, depending on the
mode selected by bits MOD1 and MOD0 in
the G1POCR3 register.
0 1: Outputs low by compare match with the
G1PO3 register.
1 0: Outputs high by compare match with the
G1PO3 register.
1 1: Do not set.
18. Timer S
Reset Value
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
Page 363 of 803
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