Advertisement
M16C/5L Group, M16C/56 Group
23.2.5
CAN Operation Mode (Bus-Off State)
The CAN module enters the bus-off state according to the increment/decrement rules for the
transmit/error counters in the CAN Specifications.
The following cases apply when recovering from the bus-off state. When the CAN module is in bus-off
state, the values of the associated registers, except registers C0STR, C0EIFR, C0RECR, C0TECR and
C0TSR, remain unchanged.
(1) When the BOM bit in the C
The CAN module enters the error-active state after it has completed the recovery from the bus-off
state and CAN communication is enabled. The BORIF bit in the C0EIFR register is set to 1 (bus-off
recovery detected) at this time.
(2) When the RBOC bit in the C
The CAN module enters the error-active state when it is in bus-off state and the RBOC bit is set to
1. CAN communication is enabled again after 11 consecutive recessive bits are detected. The
BORIF bit is not set to 1 at this time.
(3) When the BOM bit is 01b (entry to CAN halt mode automatically at bus-off entry)
The CAN module enters CAN halt mode when it reaches the bus-off state. The BORIF bit is not set
to 1 at this time.
(4) When the BOM bit is 10b (entry to CAN halt mode automatically at bus-off end)
The CAN module enters CAN halt mode when it has completed the recovery from bus-off. The
BORIF bit is set to 1 at this time.
(5) When the BOM bit is 11b (entry to CAN halt mode by a program) and the CANM bit in the
CTLR register is set to 10b (CAN halt mode) during the bus-off state
C0
The CAN module enters CAN halt mode when it is in bus-off state and the CANM bit is set to 10b
(CAN halt mode). The BORIF bit is not set to 1 at this time.
If the CANM bit is not set to 10b during bus-off, the same behavior as (1) applies.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
CTLR register is 00b (normal mode)
0
CTLR register is set to 1 (forcible return from bus-off)
0
23. CAN Module
Page 603 of 803
Advertisement
