Overlapping Chip-Select Registers; Programming Model; Chip-Select Group Base Address Registers; Table 6-2 Chip-Select Group A Base Address Register Description - Motorola MC68VZ328 User Manual

Programming Model

6.2.3

Overlapping Chip-Select Registers

Do not program group address and chip-select registers to overlap, or the chip-select signals will overlap.
Unused chip-selects must be disabled. Map them to an unused space, if possible.
When the CPU tries to write to a read-only location that has already been programmed, the chip-select and
DTACK signals will not be generated internally. BERR will be asserted internally if the bus error time-out
function is enabled.
The chip-select logic does not allow an address match during interrupt
acknowledge cycles.
6.3 Programming Model
The chip-select module contains registers that are programmed to control external devices, such as
memory. Chip-selects do not operate until the register in a particular group of devices is initialized and the
EN bit is set in the corresponding chip-select register. The only exception is the CSA0 signal, which is the
boot device chip-select.
6.3.1

Chip-Select Group Base Address Registers

The upper 15 bits of each base address register selects the starting address for the chip-select address
range. The GBAx field is compared to the address on the address bus to determine if the group is decoded.
The chip-select base address must be set according to the size of the corresponding chip-select signals of
the group. For example, if CSA1 and CSA0 are each assigned a 2 Mbyte memory space, the CSGBA
register must be set in a 4 Mbyte space boundary, such as system address 0
and so on. It cannot be set at 0
CSGBA Chip-Select Group A Base Address Register
BIT
14 13
15
GB GB GB
A28 A27 A26
TYPE rw rw rw
0 0 0
RESET
Table 6-2. Chip-Select Group A Base Address Register Description
Name
GBAx Group A Base Address—These bits select
Bits 15–1 the high-order bits (28–14) of the starting
address for the chip-select range.
Reserved Reserved
Bit 0
6-4
NOTE:
× ×
1 Mbyte, 0 2 Mbyte, 0
12 11 10 9
GB GB GB GB
A25 A24 A23 A22 A21
rw rw rw rw
0 0 0 0
Description
MC68VZ328 User's Manual
×
0, 0
× ×
3 Mbyte, 0 5 Mbyte, and so on.
8 7 6 5
GB GB GB GB GB
A20 A19 A18 A17
rw rw rw rw
0 0 0 0
0x0000
The chip-select base address must be set
according to the size of the corresponding
chip-select signals of the group.
This bit is reserved and should be set to 0.
× ×
4 Mbyte, 0 8 Mbyte,
0x(FF)FFF100
4 3 2 1 BIT 0
GB GB GB
A16 A15 A14
rw rw rw rw
0 0 0 0
Setting
0