Location Monitor Upper Base Address Register; Location Monitor Lower Base Address Register - Motorola MVME3600 Series Programmer's Reference Manual

Board Description and Memory Maps
1

Location Monitor Upper Base Address Register

REG
BIT SD7
FIELD VA15
OPER
RESET 0

Location Monitor Lower Base Address Register

REG
BIT SD7
1-40
LM1 LM1 status bit. This bit can be set by either the location
monitor function or the SET_LM1 control bit. LM1
correspond to offset 3 from the location monitor base
address. This bit can only be cleared by a reset or by
writing a 1 to the CLR_LM1 control bit.
LM0 LM0 status bit. This bit can be set by either the location
monitor function or the SET_LM0 control bit. LM0
correspond to offset 1 from the location monitor base
address. This bit can only be cleared by a reset or by
writing a 1 to the CLR_LM0 control bit.
The Location Monitor Upper Base Address Register is an 8-bit register
located at ISA I/O address x1002. The Universe ASIC is programmed so
that this register can be accessed from the VMEbus to provide VMEbus
location monitor function.
Location Monitor Upper Base Address Register - Offset $1002
SD6 SD5
VA14 VA13
0 0
VA[15:8] Upper Base Address for the location monitor function.
The Location Monitor Lower Base Address Register is an 8-bit register
located at ISA I/O address x1003. The Universe ASIC is programmed so
that this register can be accessed from the VMEbus to provide VMEbus
location monitor function.
Location Monitor Lower Base Address Register - Offset $1003
SD6 SD5
SD4 SD3
VA12 VA11 VA10
R/W
0 0
SD4 SD3
Computer Group Literature Center Web Site
SD2 SD1 SD0
VA9 VA8
0 0
SD2 SD1 SD0
0