4.7 REGISTER DESCRIPTIONS
4.7.1 System Memory Control Registers
4.7.1.1 SCREEN STARTING ADDRESS REGISTER (SSA).
31
30
29
28
SSA31
SSA30
SSA29
SSA28
15
14
13
12
SSA15
SSA14
SSA13
SSA12
Address: $(FF)FFFA00
SSA31-SSA1
32-bit screen-starting address of the LCD panel (see Figure 4-8). The LCDC fetches pixel
data from system memory at this address.
4.7.1.2 VIRTUAL PAGE WIDTH REGISTER (VPW).
VP8-VP0M
Virtual Page Width Register
This register (see Figure 4-9) specifies the virtual page width of the LCD panel in terms of
byte count. VP0 defaults to zero because of the 16-bit transfers.
VPW = virtual page width in pixels divided by c where c is 16 for black-and-white display
and 8 for gray level.
4.7.2 Screen Format Registers
4.7.2.1 SCREEN WIDTH REGISTER (XMAX).
15
14
13
12
UNUSED
Address: $(FF)FFFA08
MOTOROLA
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
27
26
25
SSA27
SSA26
SSA25
11
10
9
SSA11
SSA10
SSA9
Figure 4-8. Screen Starting Address Register
Screen-Starting Address Register
7
6
5
VP8
VP7
VP6
Address: $(FF)FFFA05
Figure 4-9. Virtual Page Width Register
11
10
9
XM9
Figure 4-10. Screen Width Register XMAX
24
23
22
21
SSA24
SSA23
SSA22
SSA21
8
7
6
5
SSA8
SSA7
SSA6
SSA5
4
3
2
1
VP5
VP4
VP3
VP2
Reset Value: $FF
8
7
6
5
XM8
XM7
XM6
XM5
LCD Controller
20
19
18
17
SSA20
SSA19
SSA18
SSA17
4
3
2
1
SSA4
SSA3
SSA2
SSA1
Reset Value: $00000000
0
VP1
4
3
2
1
XM4
XM3
XM2
XM1
Reset Value: $03FF
16
SSA16
0
0
0
XM0
4-13