Channel Mode Register (Cmr) - Motorola MC68302 User Manual

They also provide a means of controlling the IDMA and monitoring its status.
All registers can be modified by the M68000 core. The IDMA also includes
another 16-bit register, the data holding register (OHR), which is not acces-
sible to the M68000 core.
3.1.2.1 CHANNEL MODE REGISTER (CMR). The CMR, a 16-bit register, is reset to
$0000.
15 14 13 12
11 10 9 8
I - I
ECO
I
INTN
I
INTE
I
REQG
I
SAPI
I
DAPI
I
SSIZE DSIZE BT RST STR
Bit 15 - Reserved for future use.
ECO - External Control Option
0 =If the request generation is programmed to be external, the control
signals (OREO, DACK, and DONE) are used in the source (read) portion
of the transfer since the peripheral is the source.
1 =If the request generation is programmed to be external, the control
signals (OREO, DACK, and DONE) are used in the destination (write)
portion of the transfer since the peripheral is the destination.
INTN - Interrupt Normal
0 =When the channel has completed an operand transfer without error
conditions as indicated by DONE, the channel does not generate an
interrupt request to the IMP interrupt controller. The DONE bit .re-
mains set in the CSR.
1 =When the channel has completed an operand transfer without error
conditions as indicated by DONE, the channel generates an interrupt
request to the IMP interrupt controller and sets DONE in the CSR.
NOTE
An interrupt will only be generated if IDMA is enabled in the interrupt
mask register (IMR).
INTE - Interrupt Error
MOTOROLA
0 =If a bus error occurs during an operand transfer either on the source
read (BES) or the destination write (BED), the channel does not gen-
erate an interrupt to the IMP interrupt controller. The appropriate bit
remains set in the CSR.
1 =If a bus error occurs during an operand transfer either on BES or BED,
the channel generates an interrupt to the IMP interrupt controller and
sets the appropriate bit (BES or BED) in the CSR.
MC68302 USER'S MANUAL 3-5